Interfacing 8085 to VFD

Contents

1 Introduction
2 VFD Hardware Interface
1. 2.1 Considerations
2. 2.2 VFD Connection Schematic
3 Programming the VFD

Introduction

I bought a couple of Noritake Itron CU24025ECPB-W1J from Surplus Gizmos - our local surplus store. It is a character display similar to popular LCD displays based on Hitachi HD44780 LCD controller. While the HD44780 only supports the Motorola 6800 interface, this VFD also supports the Intel 8000 interface, which makes it simple to connect to my MiniMax8085 SBC, all that's needed is an I/O address decoder.

VFD Hardware Interface

Considerations

I've considered a few ways to build an I/O decoder:

Using a 74LS138 1-of-8 decoder.
Using a 74LS682 comparator.
Using a simple programmable logic device (SPLD).

Initially I've used the comparator as shown on figure (2) on the right. This is a simple approach and it has a couple of advantages: The I/O address can be set to any number using 7 DIP switches. And it does the complete I/O address decode, so that no I/O port aliasing occurs. This approach worked fairly well, but eventually I switched to using the 74LS138 decoder. I wired it as shown on figure (1) on the right. The I/O decoder has 8 outputs and so it can be used to decode addresses for 8 different devices. I've chosen this since I also wanted to decode the I/O address for a keypad controller (more on this later). The drawbacks are that the addresses are pretty much predefined by the way 74LS138 is wired, and it doesn't perform complete I/O decode, and so there is an I/O port aliasing. In my case, it uses ports 0x38 and 0x39 for the VFD, but ports 0x3A-0x3F also will address the VFD.

VFD Connection Schematic

The final schematic of the MiniMax8085 to VFD connection is shown on the left. The 5V power, ground, and the data signals AD0-AD7 connect directly to the VFD power, ground, and the data DB0-DB7 signals respectfully. The address line A0 is connected to the RS (register select) signal of the VFD, so that the lower address bit determines whether a command (A0 == 0) or data (A0 == 1) is being written to the VFD.

An 74LS138 I/O decoder and two 74LS32 2-input OR gates are used for I/O decode and generating /WR and /RD signals to the VFD. It works as follows:

The IO/M signal and address lines A6 and A7 are wired to the enable signals G1, /G2A, and /G2B of the 74LS138 decoder. So that the decoder is enabled when IO/M signal is high (1), meaning I/O access, and A6 and A7 address lines are low (0), indicating 00xxxxxx address (or 0x00 - 0x3F).
Address lines A3 - A5 are wired to the decoder inputs A0 - A2 respectfully. They select which of the outputs is activated. In my case I choose output O7 to select the VFD. This means that VFD is selected using addresses 00111xxx (or 0x38-0x3F). The corresponding output is labeled /VFD_CS on the diagram. Since the decoder doesn't have enough inputs to decode A1 and A2 address lines, these are not connected. The decoder "doesn't care" about these address lines, meaning that any values on these lines would work.
Next, when /VFD_CS is active, I need to generate the VFD read /RD signal and VFD write /WR signal, depending on the corresponding control signals from the Intel 8085 CPU. Note that all these signals are "active low", that is they indicate an operation when their logic value is 0, and they are inactive then their logic level is 1. Therefore I use OR gates instead of AND gates to perform "AND" operation.
The input 9 of the third OR gate (with input pins 9 and 10, and output pin 8) and the input 12 of the forth OR gate (with input pins 12 and 13, and output pin 11) are connected to the /VFD_CS signal.
The input 10 of the third OR gate is connected to the Intel 8085 /RD signal. This OR gate will output 0 if and only if both /VFD_CS signal and /RD signal are low (0), thus activating read operation from the VFD display.
The input 13 of the forth OR gate is connected to the Intel 8085 /WR signal. This OR gate will output 0 if and only if both /VFD_CS signal and /WR signal are low (0), thus activating write operation to the VFD display.

Programming the VFD

Initialization

Prior to displaying text, the VFD display needs to be initialized by sending the following commands (see the Hitachi HD44780 LCD controller Wikipedia page for more details and options):

Port = 0x38, Command = 0x38: Function Set: 8-bit interface; Two lines; 5x7 characters
Port = 0x38, Command = 0x0C: Display on/off control: Display power on; No cursor; No cursor blink
Port = 0x38, Command = 0x01: Clear display; Return cursor to the home position
Port = 0x38, Command = 0x06: Entry Mode: Left to Right; No scroll

Displaying the text

Once the display is initialized, the characters can be written to the display by sending their ASCII codes to port 0x39. After writing a character, the cursor automatically advances to the next position on the display.

If needed, the cursor can be moved to a different position using "Set DDRAM address" command. This command's code is 0x80 + DDRAM address. The DDRAM addresses start from 0 for the first row (row 0), and from 0x40 for the second row (row 1). For example:

Port = 0x38, Command = 0x81 - sets cursor to row 0, column 1 (0x80 + DRAM address 0x01).
Port = 0x39, Data = 0x41 - writes "A" to the current cursor position.
Port = 0x38, Command = 0xC2 - sets cursor to row 1, column 2 (0x80 + DRAM address 0x42).
Port = 0x39, Data = 0x42 - writes "B" to the current cursor position.

Other VFD commands such as "Clear display" and "Display on/off control" can also be used.

Using programmable character generator

The VFD provides eight user-programmable characters. These characters have ASCII codes from 0 to 7. The VFD controller contains Character Generator RAM (CGRAM) that holds the bitmaps for the user-programmable characters. The CGRAM can be programmed by sending "Set CGRAM address" command. This command's code is 0x40 + CGRAM address. Here are the "Set CGRAM address" commands with corresponding addresses for each of the user programmable characters:

0x40 to 0x47 - character with code 0
0x48 to 0x4F - character with code 1
0x50 to 0x57 - character with code 2
0x58 to 0x5F - character with code 3
0x60 to 0x67 - character with code 4
0x68 to 0x6F - character with code 5
0x70 to 0x77 - character with code 6
0x78 to 0x7F - character with code 7

After issuing "Set CGRAM address" command, the character bit map can be set using port 0x39. After writing each byte the CGRAM address is automatically incremented by the controller. Here is an example of programming a smiley face character:

Character bitmap:

Pixels	Binary	Hexadecimal
░░░░░ ░█░█░ ░░░░░ ░░░░░ █░░░█ ░███░ ░░░░░	00000 01010 00000 00000 10001 01110 00000	0x00 0x0A 0x00 0x00 0x11 0x0E 0x00

Commands to program the character in MON85:

C> o 38 80 - set DDRAM to the first character

C> o 39 00 - print the first programmable character

C> o 38 40 - set CGRAM to the first programmable character

C> o 39 00 \

C> o 39 0A |

C> o 39 00 |

C> o 39 00 } Character data

C> o 39 11 |

C> o 39 0E |

C> o 39 00 /

C> o 39 00 - no underline

C> o 38 81 - set DDRAM to the correct position because modifying CGRAM moves the cursor

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Jul 24, 2018, 8:06 PM

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